The demultiplexer is the inverse of the multiplexer, in that it takes a single data input and n address inputs. It has 2n outputs. The address input determine which data output is going to have the same value as the data input. The other data outputs will have the value 0.

Here is an abbreviated truth table for the demultiplexer. We could have given the full table since it has only 16 rows, but we will use the same convention as for the multiplexer where we abbreviated the values of the data inputs.

a2 a1 a0 d | x7 x6 x5 x4 x3 x2 x1 x0
—————————————
0 0 0 c | 0 0 0 0 0 0 0 c
0 0 1 c | 0 0 0 0 0 0 c 0
0 1 0 c | 0 0 0 0 0 c 0 0
0 1 1 c | 0 0 0 0 c 0 0 0
1 0 0 c | 0 0 0 c 0 0 0 0
1 0 1 c | 0 0 c 0 0 0 0 0
1 1 0 c | 0 c 0 0 0 0 0 0
1 1 1 c | c 0 0 0 0 0 0 0

Here is one possible circuit diagram for the demultiplexer: